摘要
提出了一种改进的高分辨精度的 CMOS电流型排序电路 .该电路不需要偏置信号 ,简化了系统设计 .其电路结构简单 ,便于扩展 .利用平均值电路、减法电路、WTA电路和控制电路 ,可以使该排序电路在大输入电流下依然保持高性能 .它已经采用 0 .8μm标准 CMOS工艺成功制作 .芯片面积为 2 .38mm× 2 .0 0 m m (核心电路面积仅为1.12 m m× 0 .5 2 mm ) .测试结果表明该排序电路动态范围大、分辨精度高、准确度好、功耗低 ,可以广泛地应用于中值滤波、模式识别、神经网络、模糊逻辑等信号处理领域 ,具有很高的应用价值 .
An improved CMOS current-mode sorter with high-resolution that does not need any biasing signal to simplify the system design is presented.It also has a simply circuit structure to expand its scale.By using average value circuit,subtraction circuit,WTA circuit and control circuit,it keeps good performance even with large input currents.A prototype is successfully fabricated in a 0.8μm CMOS process.The die area is 2.38mm×2.00mm(the core area is only 1.12mm×0.52mm).The measured results show that the proposed sorter has a large dynamic range,high resolution,good precision and low power.It could be widely used in median filtering,pattern recognition,neural network,fuzzy logic,etc,so it has high application value.
基金
国家自然科学基金资助项目 (批准号 :6 96 36 0 30 )~~
