摘要
设计和制作了硅集成电感,采用常规的硅工艺,在衬底形成间隔的pn结隔离来减少硅衬底的涡流损耗。实验测量了硅集成电感的S参数并研究了衬底结隔离对硅集成电感的电感量和品质因素(Q)的影响。结果表明一定深度的衬底结隔离能有效地使电感Q值提高40%。
Integrated Inductors on silicon were designed and fabricated,and a method was applied to reduce the silicon substrate eddy currents. The method to form the p-n junction isolation in the Si substrate can be realized in standard silicon technologies without additional processing steps. S para- meters of the inductors were investigated based on equivalent circuit. Experimental results show that substrate p-n junction isolation at certain depth achieves good improvement may increase the in- ductor quality factor up to 40%.
出处
《功能材料与器件学报》
CAS
CSCD
2002年第1期1-4,共4页
Journal of Functional Materials and Devices
