摘要
降低编程电压 ,同时仍保持十年的数据记忆时间 ,一直是多晶硅 氮化硅 氧化硅 硅(SONOS)研究人员面临的一个巨大挑战。本文介绍SONOS可自持存储器器件设计和降低编程电压方面的进展。硅 氧化硅界面态的退化损害SONOS自持半导体存储器记忆时间的长期可靠性。首次应用在SONOS器件制作工艺上的双步高温氘退火技术 ,与传统的氢退火相比 ,显著提高了器件的耐久性能和记忆时间可靠性。我们研制成功 - 9伏 / + 10伏 (1毫秒 )可编程SONOS存储器 ,在摄氏 85度 ,一千万个擦除 /写入操作后 ,仍能确保十年的记忆时间。本文介绍编程电压降低方面的设计考虑 ,制作工艺的优化 ,描述实验过程和SONOS器件的测试 ,以及用于SONOS自持存储器动态性能测试的基于可编程门阵列的测量系统。
Scaling the programming voltage, while still maintaining 10 year data retention time, has been always a big challenge for Polysilicon Oxide Nitride Oxide Silicon (SONOS) researchers. We describe progress in the design and scaling of SONOS nonvoloatile memory devices. The deterioration of the Si SiO 2 interface is associated with the degradation of long term retention in SONOS Nonvolatile Semiconductor Memory (NVSM) devices. Two step high temperature deuterium anneals, applied in SONOS device fabrcation for the first time, improves the endurance characteristics and retention reliablility over traditional hydrogen anneals. We have realized -9V/+10V (1ms) programmable SONOS devices ensuring 10 years retention time after 10 7 Erase/Write cycles at 85℃. We introduce scaling considerations and process optimization along with experiments and SONOS device characterization. An FPGA based measurement system is described for the dynamic characterization of SONOS nonvolatile memory devices.
出处
《世界科技研究与发展》
CSCD
2002年第1期1-10,共10页
World Sci-Tech R&D
关键词
SONOS
自持半导体存储器
记忆时间
可靠性
编程电压
SONOS, nonvoloatile semiconductor memory(NVSM), programmable read only memories, deterioration of the SONOS interface, anneal
