摘要
提出基于划分的逻辑图布图策略 ,有效解决超大规模集成电路 (VL SI)逻辑原理图自动生成中规模与速度的矛盾 ,给出详细的划分模型 .结合逻辑原理图的特点设计实现种子生成的构造式划分算法和迭代改进划分算法 .实验表明 ,这两种算法的时间复杂度较低 ,算法精度及优化程度都能达到目标要求 ,在实际应用中取得了良好的效果 .
Presents a layout strategy based on partitioning, that can efficiently solve the problem of automatic generation of logic schematics for VLSI. A detailed partition model is discussed. Two efficient algorithms for multiple way partitioning of logic schematics are presented: the seed expansion algorithm and the iterative improvement algorithm. Experimental results show that these algorithms are not only low in their time complexity but also have high precision. They can readily be optimized and have affained fine results in their applications.
出处
《北京理工大学学报》
EI
CAS
CSCD
北大核心
2001年第1期19-23,共5页
Transactions of Beijing Institute of Technology
基金
部级基金资助项目
