摘要
布尔过程论是 1994年提出的一种高速电路设计与测试分析理论 ,是布尔代数在时域中的扩充 ,适用于 IC定时研究与分析 .但布尔过程论的实践可行性受到一些国际同行的质疑 ,该文的工作旨在解释布尔过程论的物理意义以及构成布尔过程论的实验基础 .文中采用 SPICE软件模拟电路中的电压波形 ,对一些电路例子进行模拟 ,发现模拟结果与用布尔过程论得出的结果是一致的 ,这就以实验验证了布尔过程论 .同时 。
Boolean process theory, which was proposed in 1994 by Yinghua Min, one of the authors of this paper, is a theory mainly used on design and test of hig h-speed circuits and it can be considered as an expansion of Boolean algebra wi t h the time field. It takes less time to calculate circuit's timing behavior usin g Boolean process than using SPICE, so it can be applied in large circuits, whil e SPICE will be too slow to use in such cases. Boolean process has been studied in recent years, and it was used in path sensitization, IDDT, and other fields. BPBDD, an expansion of BDD, was also carried out, and Boolean process can be ea sily calculated using it. As a quick calculate method, Boolean process can be ap plied in IC timing study and analysis, but some craft brothers in other countrie s question its reality. This paper explains the physical meaning of Boolean proc ess, and builds an experimental basis of Boolean process. The authors use 0.35μ m, 3.3V M OSFET transistor model and HSPICE to do simulations at switch level, get result s by observing the voltage waveforms in circuits, and do simulations on som e example circuits in this way, and the simulation results is the same as the re sults calculated by Boolean process. Therefore, Boolean process is verified to b e a realistic representation of logical and timing behavior of digital circuits by the experiments.
出处
《计算机学报》
EI
CSCD
北大核心
2000年第11期1196-1200,共5页
Chinese Journal of Computers
基金
国家自然科学基金重点课题!(6 97330 10 )的支持
台湾李国鼎基金会的资助
