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适用于软件无线电的高线性度、低功耗无源下变频混频器的设计

A High Linearity,Low Power Down-Conversion Passive Mixer for SDR
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摘要 设计了一个用于软件无线电的高线性度、低功耗的无源下变频混频器,采用TSMC 65 nm CMOS工艺实现,芯片面积为0.2 mm^2,总功耗为8 mW@1.2 V.混频器中采用了改进的Gm单元,结合源级负反馈技术和MGTR技术,在提高混频器IIP_3的同时,拓宽了输入线性区域的范围.测试结果表明:线性区域的范围得到一定程度的提高,即使输入RF信号的功率为-12 dBm.混频器的IIP_3≥10.9 dBm,IIP_2≥45 dBm;在900 MHz处,混频器获得最大转换增益13.2 dB,此时NF为13.8 dB. A low power, high linearity passive down-conversion mixer for SDR is presented, which is implemented in TSMC 65 nm CMOS process with 0. 2 rnmz core area and 8 mW power consumption under 1. 2 V supply voltage. Combining source negative feedback with MGTR technique, the IIP3 performance is improved, and the input linearity region is also extended. Measured results show that a good linearity is achieved, even the power of input RF signal is up to -12 dBm Specifically, this passive mixer achieves higher than 10.9 dBm IIP3, IIP2≥45 dBm, and 13.8 dB NF under 13. 2 dB max conversion gain, when LO frequency is 900 MHz.
出处 《复旦学报(自然科学版)》 CAS CSCD 北大核心 2014年第1期29-36,共8页 Journal of Fudan University:Natural Science
基金 国家自然科学基金资助项目(61076028) 高等学校博士学科点专项科研基金资助项目(20100071120026)
关键词 高线性度 低功耗 无源下变频混频器 软件无线电 high linearity low power passive mixer SDR
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参考文献11

  • 1Andrews C, Molnar A C. Implications of passive mixer transparency for impedance matching and noise figure in passive mixer-first receivers[J]. IEEE Transactions on Circuits on Systems I, 2010,57(12) : 3092-3103.
  • 2Poobuapheun N, Chen W H, Boos Z, et al. A 1.5 V 0. 7--2. 5 GHz CM( quadrature demodulator for multi- band direct-conversion receivers[J]. IEEE Journal of Solid-State Circuits, 2007,42(8) : 1669-1677.
  • 3Breems L, Huiising J. Continuous-time sigma-delta modulation for A/D conversion in radio receivers [M]. Dordrecht.- Kluwer Academic Pub, 2001.
  • 4Kaczman D, Shah M, Alam M, et al. A single-chip 10-hand WCDMA/HSDPA 4-band GSM/EDGE SAW-less CMOS receiver with DiRF 3G interface and +90 dBm IIP2[J]. IEEE Journal of Solid-State Circuits, 2009,44(3) : 718-739.
  • 5Kim T W, Kim B, Lee K. Highly linear receiver front-end adopting MOSFE tmnsconductance linearization by multiple gated transistorsJ]. IEEE Journal of Solid-State Circuits, 2004,39(1) : 223-229.
  • 6Sansen W M C. Analog design essentials[M]. Berlin.. Springer, 2006.
  • 7池宝勇.模拟集成电路与系统[M].北京:清华大学出版社,2009.
  • 8Anderson B, Anderson R. Fundamentals of Semiconductor devices[M]. New York: McGraw-Hill, ln , ZO04.
  • 9Darabi H, Ahidi A A. Noise in RF-CMOS mixers: A simple physical model[J]. IEEEJournal of Solid- State Circuits, 2000,35(1) : 15-25.
  • 10Manstretta D, Brandolini M, Svelto F. cond-order intermodulation mechanisms in CMC downconverters[J]. IEEE Journal of Solid-State Circuits, 2003,38(3) : 394-406.

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