摘要
为了充分利用USB2.0的带宽,解决数据传输时存在的速度瓶颈问题,提出了一种基于CY7C68013A的USB2.0高速接口设计方法。采用CY7C68013A的SLAVE FIFO工作模式,芯片内部CPU不参与数据传输,FPGA设计的外部控制电路直接读写芯片内部FIFO,有效避免了内部CPU参与数据传输时带来的时间开销,从而提高了传输速度。
In order to fully utilize the bandwidth of USB2.0 and solve the transmission bottleneck problem, a high-speed USB2.0 interface based on CY7C68013A is proposed in this paper. CY7C68013A runs at SLAVE FIFO mode,the chip＇s CPU is not involved in the data transmission. The external control circuit is designed by FPGA which read and write the chip FIFO directly. The design effectively avoids wasting of time if the internal CPU participate in the data transmission, and increases the transmission speed.
出处
《电子技术应用》
北大核心
2014年第1期131-133,共3页
Application of Electronic Technique
