摘要
网络数据量的急剧增加,带来了带宽的急剧消耗和网络拥挤问题,这些问题对分组传输网络芯片的转发容量、速率、拥塞避免和流量管理等方面提出了更高的要求。为了提高分组传输网络芯片中IP组播查找电路的工作速率和降低电路设计复杂度,采用流水线结构,并利用RAM(随机访问存储器)记录查找中间状态信息等技术完成了对IP组播查找电路的设计。在Altera系列FPGA(现场可编程门阵列)开发板EP4SGX230KF40C2ES上进行了硬件验证,结果表明,该电路能够完成IP组播查找功能,并稳定工作在200MHz频率下。
Sharp increase of network data amount causes rapid bandwidth consumption and network congestion,which places still higher requirements on Packet Transport Network（PTN）chips in terms of forwarding capacity,clock rate,congestion a-voidance and flow management.In order to improve the clock rate and reduce the circuit design complexity of the IP multicast lookup circuits in these network chips,this paper completes this circuit design by adopting pipeline architecture and looking up the intermediate state information using the RAM record.It conducts hardware verification on Altera series FPGA development board EP4SGX230KF40C2ES and the results show that this circuit can complete the IP multicast lookup function and works steadily at 200 MHz.
出处
《光通信研究》
北大核心
2013年第5期34-36,共3页
Study on Optical Communications
基金
陕西省13115科技创新工程重大科技专项项目(2009ZDKG-43)
教育部新世纪优秀人才支持计划项目(NCET-10-0877)
关键词
分组传输网络
IP组播
查找
packet transport network
IP multicast
lookup
