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全数字延时锁定环的研究进展 被引量：2

Research Development of All Digital Delay-locked Loops
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摘要 全数字延时锁定环在现代超大规模系统芯片中具有极其重要的作用,被广泛地用于解决系统时钟的产生和分布问题,因此详细分析其研究进展具有一定的理论意义和实际应用价值.首先在分析延时锁定环工作原理的基础上,阐明了全数字延时锁定环相对于全模拟和混合信号延时锁定环具有的优点.其次详细阐述了全数字延时锁定环的发展过程、研究现状和存在的问题,尤其在指出传统逐次逼近寄存器延时锁定环存在谐波锁定、锁定时间没有达到理论值和死锁三个问题的基础上,对各种改进型逐次逼近寄存器延时锁定环的性能进行了对比分析.最后对全数字延时锁定环的未来发展趋势进行了展望. All digital delay-locked loops play a very important role in modem day very large scale integrated system-on-chips for wide- ly used to solve the problems of generation and distribution of the system clocks, so analyzing its research development has theoretical and actual application sense. Based on analyzing the operation principle of the delay-locked loops, the advantages of the all digital de- lay-locked loops are presented, compared to the all analog and mixed-signal delay-locked loops. The developing process, research status and current problems of all digital delay-locked loops are described in detail, especially, the three issues of harmonic-locking, lock-time longer than theoretical value and dead-lock of the conventional all digital delay-locked loops are pointed out, and then the performances of various improved all digital delay-locked loops are compared. Finally the future development trends of all digital de- lay-locked loops are pointed out.
作者 徐太龙 陈军宁 孟坚 徐超 柯导明
机构地区 安徽大学电子信息工程学院安徽省集成电路设计实验室
出处 《小型微型计算机系统》 CSCD 北大核心 2013年第6期1371-1374,共4页 Journal of Chinese Computer Systems
基金 安徽大学青年科学研究基金项目(KJQN1011)资助 安徽大学青年骨干教师培养项目(33010224)资助 安徽省高校优秀青年人才基金项目(2012SQRL013ZD)资助 国家自然科学基金项目(61076086)资助 国家科技重大专项项目(2009ZX01031-001-004)资助
关键词 时钟偏差 全数字延时锁定环 逐次逼近寄存器 锁定时间 clock skew au digital delay-locked loop successive approximation register lock time
分类号 TP303 [自动化与计算机技术—计算机系统结构]
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参考文献8

二级参考文献42

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共引文献15

同被引文献29

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小型微型计算机系统
2013年 第6期

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