摘要
依据频率综合器的设计原理,运用ADIsimPLL软件设计电路的相关参数,在软件平台中进行建模及初步电路仿真。借鉴以往经验选择关键参量进行优化设计,得出了符合指标要求的频率综合器设计模型及环路参数,并根据该设计模型及相应的环路参数进行了产品加工及性能测试。性能测试分析表明,采用该频率综合器设计原理设计的频率综合器具有相位噪声指标高、调试简单、尺寸小等特点,完全适用于系统及工程应用。
The design parameters of frequency synthesizer can be calculated with ADIsimPLL based on the design principle. Modeling and circuits simulation are performed in ADIsimPLL. With reference to previous experience ,the loop parameter and the model of frequency synthesizer that meet the required specifications are obtained from the optimization of key parameters. Product manufacturing and performance testing are accomplished based on the model and the corresponding loop parameter, and testing results show that this frequency synthesizer has the advantages of high phase noise performance, simple debugging and small size. It is applicable for engineering applications.
出处
《无线电通信技术》
2013年第3期67-68,96,共3页
Radio Communications Technology
