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融合动态采样剖析的可重构指令集处理器

Reconfigurable Instruction Set Processor Integrating Dynamic Sampling Profiler
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摘要 可重构指令集处理器能够根据应用程序特点动态扩展其指令集,其硬件架构和软件工具的设计与传统设计有很大不同。在研究可重构指令集处理器软硬件特性的基础上,提出一种集成动态采样剖析硬件的可重构指令集处理器架构。该处理器具有3种不同的工作模式,它通过剖析硬件采样获取程序热点,利用配套工具链半自动地完成指令扩展生成、编译器重定向和可编程硬件逻辑配置,从而获得在不同嵌入式应用领域的硬件适应性和软件兼容性。针对性的实验结果表明,该处理器架构的采样剖析机制准确有效,并且在增加有限的硬件开销的情况下,能够很好地适应应用变化。 Reconfigurable instruction set processor （RISP） can dynamically extend its instruction set based on specific applications characteristics. The design of its hardware architecture and software tools is very different from the tradi- tional design ideas. Based on the research for the features of RISP, a RISP integrating dynamic sampling profiler （DSP- RISP） was proposed. DSP-RISP has three kinds of working modes, obtaines the hot spots of applications through a hardware profiler with sampling mechanisms and then with the software tool chain semi-automatically completes the work such as instruction extension and generating, compiler retargeting and programmable hardware logic configuration to achieve the hardware adaptability and software compatibility for various embedded applications. Experimental results show that the sampling profiler of DSP-RISP is accurate and effective and under the limited hardware overhead, DSP- RISP can well adapt to application changes.
作者 张惠臻 王超
机构地区 华侨大学计算机科学与技术学院 中国科学技术大学计算机科学与技术学院
出处 《计算机科学》 CSCD 北大核心 2013年第3期31-35,共5页 Computer Science
基金 国家自然科学基金青年基金(61202053) 华侨大学引进人才科研基金(12BS214)资助
关键词 计算机系统结构 可重构指令集处理器 指令扩展 动态采样剖析 Computer architecture, Reconfigurable instruction set processor, Instruction extended, Dynamic samplingprofiling
分类号 TP302 [自动化与计算机技术—计算机系统结构]
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参考文献19

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