摘要
PCI Express作为第三代高性能I/O互连技术具有很多技术优势,如基于报文交换、点对点连接、LVDS高速串行互连、高带宽等。但是,PCI Express技术更多地应用于通用高性能计算机领域,鲜有将其应用于嵌入式系统设计中的实例。本文基于自行研制的一款嵌入式多核SoC系统YHFT-QDSP,根据系统设计需求,结合PCI Express技术特点,采用基于IP裁剪的快速设计方法将PCI Express技术应用于系统片间互连模块的设计中,缩短了设计周期并获得了良好的设计效果。采用0.13μm工艺单元库实现,PCI Express片间互连模块总面积为0.65mm2,其中协议转换模块面积为0.12mm2,片间数据传输有效带宽可达1.63Gb/s。
With the increase of application requirement and the development of semiconductor tech- nology, MPSoC （Multi-Processor System-on-Chip） becomes a key research area. As the third generation high performance I/O interconnection technology, PCI Express has many technical advantages, such as high-speed, high-performance, point-to-point, dual simplex, packet based protocol, differential signa- ling link for interconnecting devices. PCI Express has been more applied in general purpose high per- formance computers. In this paper, we applied PCI Express to an inter-chip interconnection module of QDSP, which is an embedded MPSoC. We took into account both design requirement and characteristics of PCI Express, adopted IP based design method, so the design period is shortened and the results are favorable. The total area of the inter-chip module is 0.65turn2 in 0.13μm technology, and the protocol conversion module has an area of 0.12mm2. The valid bandwidth of data transmission is 1.63Gb/s.
出处
《计算机工程与科学》
CSCD
北大核心
2013年第1期41-46,共6页
Computer Engineering & Science
基金
国家863计划资助项目(2009AA011704)
"核高基"重大专项(2009ZX01034-001-001-006)
