摘要
The limited lifespan is the Achilles＇ heel of solid state drives （SSDs） based on NAND flash.. NAND flash has two drawbacks that degrade SSDs＇ lifespan. One is the out-of-place update. Another is the sequential write constraint within a block. SSDs usually employ write buffer to extend their lifetime. However, existing write buffer schemes only pay attention to the first drawback, while neglect the second one. We propose a hetero-buffer architecture covering both aspects simultaneously. The hetero-buffer consists of two components, dynamic random access memory （DRAM） and the reorder area. DRAM endeavors to reduce write traffic as much as possible by pursuing a higher hit ratio （overcome the first drawback）. The reorder area focuses on reordering write sequence （overcome the second drawback）. Our hetero-buffer outperforms traditional write buffers because of two reasons. First, the DRAM can adopt existing superior cache replacement policy, thus achieves higher hit ratio. Second, the hetero-buffer reorders the write sequence, which has not been exploited by traditional write buffers. Besides the optimizations mentioned above, our hetero-buffer considers the work environment of write buffer, which is also neglected by traditional write buffers. By this way, the hetero-buffer is further improved. The performance is evaluated via trace-driven simulations. Experimental results show that, SSDs employing the hetero-buffer survive longer lifespan on most workloads.
The limited lifespan is the Achilles＇ heel of solid state drives （SSDs） based on NAND flash.. NAND flash has two drawbacks that degrade SSDs＇ lifespan. One is the out-of-place update. Another is the sequential write constraint within a block. SSDs usually employ write buffer to extend their lifetime. However, existing write buffer schemes only pay attention to the first drawback, while neglect the second one. We propose a hetero-buffer architecture covering both aspects simultaneously. The hetero-buffer consists of two components, dynamic random access memory （DRAM） and the reorder area. DRAM endeavors to reduce write traffic as much as possible by pursuing a higher hit ratio （overcome the first drawback）. The reorder area focuses on reordering write sequence （overcome the second drawback）. Our hetero-buffer outperforms traditional write buffers because of two reasons. First, the DRAM can adopt existing superior cache replacement policy, thus achieves higher hit ratio. Second, the hetero-buffer reorders the write sequence, which has not been exploited by traditional write buffers. Besides the optimizations mentioned above, our hetero-buffer considers the work environment of write buffer, which is also neglected by traditional write buffers. By this way, the hetero-buffer is further improved. The performance is evaluated via trace-driven simulations. Experimental results show that, SSDs employing the hetero-buffer survive longer lifespan on most workloads.
基金
Supported by the National High Technology Research and Development 863 Program of China under Grant No.2013AA013201
the National Natural Science Foundation of China under Grant Nos.61025009,61232003,61120106005,61170288
