摘要
针对多路有限长单脉冲响应(Finite Impulse Response,FIR)滤波器实现结构的资源需求量有待降低的问题,本文根据多路采样数据的时分多路复用传输机制,通过使多路采样数据复用同一单路FIR滤波器,对多路FIR滤波器的FPGA实现结构进行优化。分析证明,该优化实现结构由不同类型的单路FIR滤波器实现结构构成时,与典型多路FIR滤波器实现结构相比,其寄存器需求量大幅降低,同时可以保证乘法器和加法器需求量大幅降低或大致相同。
Because the demand for resources of multi-channel Finite Impulse Response （FIR） filter implementation structure is to be reduced, the paper optimizes the implementation structure of multi-channel FIR filter whose multi-channel input data are transported through time-division multiplexed mechanism. In the optimized structure of FIR filter which is implemented in FPGA the multi-channel input data share the same single-channel FIR filter. Compared to the typical structure of multi-channel FIR filter, the resource evaluation proves that when the optimized structure is formed by different kinds of single-channel FIR filters, it achieves significant reduction in the demand of registers, and it is roughly the same or achieves significant reduction in the demands of multipliers and adders.
出处
《应用声学》
CSCD
北大核心
2012年第5期393-398,共6页
Journal of Applied Acoustics
关键词
多路FIR滤波器
时分复用
现场可编程门阵列
Multi-channel Finite Impulse Response （FIR） filter, Time-division multiplex, Field-programmable gate array
