摘要
为了解决传统的线性插值算法在数据同步化过程中涉及到大量的乘、除法操作,从而导致运算效率低等问题,将移位线性插值技术应用到数据同步化中。开展了用移位比较的方式对非同步化数据进行线性插值以实现数据同步化的分析,建立了完成一个整周期同步化与所需CPU时钟周期之间的关系,提出了移位线性插值的方法;最后,在DSP TMS320F2812上对移位线性插值算法完成64点同步化运行的时钟周期进行了统计。研究结果表明,移位线性插值算法减少了CPU运行的时钟周期,运算效率提高了近768.08%。
In order to solve the problems of frequent multiplication and division and low computational efficiency in the process of data synchronization linear interpolation, the shifting linear interpolation was investigated. After analysis of data synchronization linear interpolation with shifting and comparing, the relationship between completing a whole cycle synchronization with desired CPU clock cycles was established, and the shifting linear interpolation algorithm was presented. The CPU clock cycles of the shifting linear interpolation which completed 64-point synchronization were evaluated on the DSP TMS320F2812. The experimental results show that the shifting linear interpolation algorithm reduces the CPU clock cycles and improves the computational efficiency by 768.08%.
出处
《机电工程》
CAS
2012年第10期1217-1219,共3页
Journal of Mechanical & Electrical Engineering
