摘要
描述了一种基于现场可编程逻辑阵列(FPGA)的高速核信号采集系统的设计方案。FPGA作为控制核心,实现对高速Analog-to-Digital Converter(ADC)和Universal Serial Bus(USB)的逻辑控制和数字信号的采样、滤波、甄别、存储、传输处理,并使用异步First In First Out(FIFO)实现ADC数据采集模块和USB数据传输模块2个不同时钟域之间的数据传输,提高数据的吞吐率。最后利用上位机软件进行数据处理和绘图显示。测试结果表明,该系统能够实现核信号的实时、高效采集。
A high - speed unclear signal acquisition system is introduced based on the field - programmable logic array （FPGA）. FPGA, as control core, realizes the logical control of the high- speed Analog- to- Digital Converter（ADC） and Universal Serial Bus（ USB ）, and performs sampling, filtering, screening, storage and transmission of digital signal. And asynchronous First In First Out （FIFO） is used for data transmission in different clock domains between the ADC data acquisition module and the USB data transmission module to increase data throughput. Finally, PC software is used for data processing and display. The test results show that the system can achieve real -time efficient nuclear signal acquisition.
出处
《核电子学与探测技术》
CAS
CSCD
北大核心
2012年第7期834-838,共5页
Nuclear Electronics & Detection Technology
基金
国家自然科学基金青年基金(41104118)
国家杰出青年科学基金(41025015)
地质灾害防治国家重点实验室基金(SKLGP2010Z002)
关键词
核信号
高速采样
数字信号处理
异步FIFO
nuclear signal
high - speed sampling
digital signal processing
asynchronous FIFO
