摘要
针对日益增强的船舶自动识别系统(AIS)信号侦察需求,以实时解调为主要侦察手段,结合采样数据存储,提出了一种通用的AIS信号侦察的FPGA设计方案。通过乒乓操作、高精度计时器等设计,解决了AIS侦察的实时解调、标准时隙校准、高精度时标等问题。试验结果验证了该设计的实用性。
According to the growing ship automatic identification system（AIS） signal demand, by us- ing real - time demodulation as the main reconnaissance measure, and in combination with the sampling data storage, a general FPGA design of AIS signal reconnaissance scheme is proposed. Tnrough ping - pong operation and high - precision timer design,such problems as the real - time detmdulation of the AIS reconnaissarce, calibration for stan- dard slot and high- precision time scale are solved. The feasibility of the scheme is verified by test.
出处
《电讯技术》
北大核心
2012年第7期1125-1128,共4页
Telecommunication Engineering
关键词
AIS
信号侦察
数字解调
采样数据存储
实时解调
AIS
signal reconnaissance
digital demodulation
sample data storage
real - time demodulation
