摘要
数字下变频(DDC,Digital Down Conversion)是软件无线电系统的关键技术之一,其可将高频数据流信号变成易于后端数字信号处理器(DSP,Digital Signal Processor)设备实时处理的低频数据流信号。给出了一种基于现场可编程门阵列(FPGA,Field Programmable Gate Array)的数字下变频器的设计方案,并详细介绍了组成的下变频器的各个模块:数字振荡控制器(NCO,Numerical Controlled Oscillator)模块、混频模块、以及由积分梳妆(CIC,Cascaded Integrator-Comb)滤波器、半带(HB,Half-Band)滤波器、有限长单位冲激响应(FIR,Finite Impulse Response)滤波器级联而成的抽取滤波模块的设计方法。各个模块的仿真结果表明了设计的正确性,而最后系统仿真结果则表明文中数字下变频技术的设计具有其可行性和实用性。
Digital Down Conversion（DDC） is one of the key technologies for software radio,which converts high frequency data streams into low frequency data streams for easy subsequent real-time processing by DSP devices.In this paper,an FPGA based DDC framework is proposed,and the design methods for DDC modules,including Numerical Controlled Oscillator（NCO）,frequency mixing module,CIC filter,HB filters,FIR filter,are discussed in detail.The simulation results of each module show that the design is correct,and the simulation results of final system indicate that the proposed Digital Down Conversion（DDC） system is feasible and parcticable.
出处
《通信技术》
2011年第10期19-21,24,共4页
Communications Technology
