摘要
针对传统的多通道数字下变频处理运算量大、逻辑资源利用率低、难以实现同时对各通道高速率的数字中频信号进行实时处理的缺点,研究提出了一种通用的多通道数字下变频优化方案,并将其在现场可编程门阵列(FPGA)平台上实现。该方案采用相位旋转和分时复用技术,实现了对数字本振、半带滤波器及低通滤波器等组件的复用,提高FPGA逻辑资源的利用效率。实验结果表明,该方案能有效减少多通道数字下变频处理的运算量,以较少的FPGA逻辑资源实现对高速数字中频信号的实时处理,并且具备良好的移植性。
To overcome the shortcomings of traditional multi-channel digital down converter such as complex computation, inefficient usage of logic resources and incapable processing high-speed multi-channel digital intermediate frequency （IF） signals synchronously in real-time, this paper introduces a scheme to optimize universal muhi-channel digital down converter. The scheme was implemented in a field programmable gate array （FPGA） platform. It adopts the technologies of phase rotation and time division muhiplexing, realizes the reuse of numerical controlled oscillator （NCO） , half band filter （HBF） and low-pass filter （LPF） and improves the utilization efficiency of FPGA re- sources. Experiment result shows that this scheme can realize real-time processing of high-speed multi-channel digital IF signals with less computation and FPGA resources. And this scheme also has good portability.
出处
《仪器仪表学报》
EI
CAS
CSCD
北大核心
2011年第9期1993-1997,共5页
Chinese Journal of Scientific Instrument
基金
国家自然科学基金(No.60762005)资助项目
关键词
下变频
多通道
相位旋转
分时复用
FPGA
down conversion
muhi-channel
phase rotation
time division multiplexing
FPGA
