摘要
基于半定制集成电路设计流程,提出一种对CMOS集成电路进行电磁信息泄漏评估的方法。该方法首先利用综合工具生成电路的门级网表,将门级网表中的普通单元替换为防护逻辑单元,然后利用电磁辐射仿真模型和电磁信息泄漏评估模型对集成电路进行电磁辐射仿真和信息泄漏分析。该方法能够在设计阶段对密码芯片的抗电磁旁路攻击能力进行评估,可提高密码芯片的设计效率,减少资源浪费。
A method was proposed to evaluate the electromagnetic information leakage of CMOS ICs based on the design flow of semi-custom IC.This method gets the gate netlist first with the synthesis tools,then the common cell of the netlist is replaced by defending logic cell.After that,the electromagnetic information leakage of ICs is evaluated with the simulation model and electromagnetic information leakage evaluation model.With this method,the designer is able to evaluate the capability against electromagnetic side channel attack on cipher chip at the designing stage.So,this method can improve the efficiency and reduce the resources when designing the cipher chip
出处
《军械工程学院学报》
2011年第2期22-25,共4页
Journal of Ordnance Engineering College
关键词
密码芯片
侧信道攻击
电磁信息泄漏评估
CMOS集成电路
cipher chip（CC）
side channel attack（SCA）
electromagnetic information leakage evaluation（EILE）
CMOS integrated circuit（CMOS IC）
