摘要
为了在嵌入式设备中高效运行快速傅里叶变换算法,提出了一种针对小尺寸高速缓冲存储器优化的旋转因子的生成与访存策略,该方法能够有效提高缓存命中率及运算速率。给出了不同需求下配置参数的选取原则,基于典型算法配置参数和目标处理器平台进行算法测试。实验结果证明,优化后的方法在信噪比性能下降较小的情况下能够获有效地提升计算速率。
In order to run Fast Fourier Transform（FFT） algorithm more efficiently in embedded devices,an optimized design of twiddle factors for the small Cache was presented.The design can effectively enhance read-percent cache hits and improve processing speed.The selection principle of configuration parameters in different needs was given and the experimental results based on typical configuration parameters and target processor were discussed.It is proved that this optimized method can effectively improve processing speed with slight Signal to Noise Ratio（SNR） decrease.
出处
《信息与电子工程》
2011年第2期206-210,共5页
information and electronic engineering
基金
教育部科技重点基金资助项目(108022)
