摘要
在嵌入式系统的设计中,如何有效地降低系统的功耗,是设计师必须面对的问题,本文主要从处理器工作方式、电压变化结构及编译优化等方面入手,就如何降低嵌入式系统功耗的问题进行了分析论证.
In the designing of embedded system,how to effectively reduce power consumption is the problem that designer has to confront.The article mainly analyzes systematic power consumption through the working ways of treater,the structure of voltage variation and compiler optimization.
出处
《白城师范学院学报》
2010年第6期33-35,共3页
Journal of Baicheng Normal University
关键词
嵌入式系统
低功耗设计
访问方式
编译优化
embedded system
low-power consumption design
access mode
compiler optimization
