摘要
三线同步串口传输方式具有简单可靠、实现容易、占用线缆少等优点,为了适应线阵CCD双端输出的高速成像模式需求,本文引入了DDR(Double Data Rate,双数据速率)读写方式,对三线同步串口进行改造,探讨如何在较低时钟频率下达到较高的传输带宽,提出了基于DDR的四线同步串口设计,当同步帧使能信号有效时,同时传输两组具有固定时延的数据,在接收端设计合适的缓存协议,实现了图像高速串行传输。该设计的程序编码比较简单,不过多增加传输线缆的负担,易于软硬件实现和工程应用。
Traditional 3-wire synchronous serial interface （SSI） is widely used for its yarage, high reliability with less connection. To adapt to higher transmission rate of dual-port CCD image system, the author introduces DDR interface to study how to obtain higher transmission bandwidth with lower clock rate. The paper raises the design of 4-wire SSI based on 3-wire mode. When the synchronous frame enable is active, two groups of phase-locked data are clocked both on the rising edge and falling edge of the clock, effectively doubling the raw bandwidth with the same clock. In addition, it almost doesn＇t increase the connection burden. This design can be easily implemented with programming code and could be put into practical engineering with relevant hardware.
出处
《微计算机信息》
2011年第2期38-40,共3页
Control & Automation
