摘要
设计了一种用于Σ-ΔA/D转换器的运算放大器,该运算放大器采用两级全差分折叠式共源共栅结构。运用动态频率补偿技术,实现两种工作状态下的频率补偿。提出一种新型共模反馈(CMFB)方案,使共模电平获得较高的稳定度。整个运放电路采用0.35μm标准CMOS工艺,电源电压为5 V。仿真结果表明,在5 V电压下,运放的直流增益为120.5 dB,输出摆幅为±4.2 V。
A design methodology of operational amplifier（op-amp） for Σ-Δ A/D converter was proposed.A two-stage fully differential folded-cascode structure was adopted for the circuit.By using dynamic frequency compensation technique,frequency compensation in two operational modes was accomplished.A new common-mode feedback（CMFB） structure was proposed to achieve higher stability of common-mode level.The circuit was implemented using 0.35 μm mixed-signal technology.Simulation results indicated that the op-amp had a DC voltage gain of 120.5 dB and an output swing of ±4.2 V at 5 V supply voltage.
出处
《微电子学》
CAS
CSCD
北大核心
2011年第1期27-29,33,共4页
Microelectronics
基金
预研基金资助项目(9140C0901100901)
关键词
运算放大器
频率补偿
共模反馈
折叠式共源共栅
Operational amplifier
Frequency compensation
Common-mode feedback
Folded-cascode
