摘要
数字图象边缘检测通常受到处理器速度的限制,为解决这一问题,论文采用FPGA技术、对基于Sobel算子的数字图象边缘检测进行设计和实现。给出了硬件设计组成原理、主要程序代码设计方法,整个算法使用一片FPGA芯片Xilinx Spartan3 XC3S50-5PQ208设计集成,仿真研究结果表明该芯片能以134MHz的速度运行,通过对1024*1024像素大小的Tena图象实验,在7.8ms内获得了满意的边缘检测结果。
Digital image edge detection is usually limited by the speed of processor,in order to solve this problem,FPGA technology is employed in this paper based on Sobel edge detection algorithm.After the hardware structure and design principle were introduced,the main program code and the simulation results were presented.The algorithm was realized and integrated in a FPGA chip of Xilinx Spartan3 XC3S50-5PQ208.The simulated result indicates that the presented FPGA chip XC3S50-5PQ208 can run at 134MHz speed.Finally,the experiment was done to tena image of 1024 x 1024 pixels.The tested result shows that the clean edge can be obtained within 7.8ms.
出处
《信息通信》
2010年第6期46-49,共4页
Information & Communications
