摘要
详细阐述了硬件描述语言(HDL)的特点,并以用Verilog HDL设计Cache为例,说明如何采用自顶向下方法设计数字系统以及这种设计的优越性。
The features of HDL are discussed in this paper. And design of digital system using a top-down approach is also described. Its advantages are demonstrated by designing a Cache using verilog HDL.
关键词
硬件描述语言
VERILOG
HDL
数字电路
数字系统
HDL
Verilog HDL
Concurrency
Synthesis
"Write through" operation mode
Top-down design approach
