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Noise analysis and characterization of a full differential CMOS interface circuit for capacitive closed-loop micro-accelerometer

Noise analysis and characterization of a full differential CMOS interface circuit for capacitive closed-loop micro-accelerometer
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摘要 To achieve a high precision capacitive closed-loop micro-accelerometer,a full differential CMOS based on switched-capacitor circuit was presented in this paper as the sensor interface circuit.This circuit consists of a balance-bridge module,a charge sensitive amplifier,a correlated-double-sampling module,and a logic timing control module.A special two-path feedback circuit configuration was given to improve the system linearity.The quantitative analysis of error voltage and noise shows that there is tradeoff around circuit's noise,speed and accuracy.A detailed design method was given for this tradeoff.The noise performance optimized circuit has a noise root spectral density of 1.0 μV/Hz,equivalent to rms noise root spectral density of 1.63 μg/Hz.Therefore,the sensor's Brown noise becomes the main noise source in this design.This circuit is designed with 0.5 μm n-well CMOS process.Under a ±5 V supply,the Hspice simulation shows that the system sensitivity achieves 0.616 V/g,the system offset is as low as 1.456 mV,the non-linearity is below 0.03%,and the system linear range achieves ±5 g. To achieve a high precision capacitive closed-loop micro-accelerometer,a full differential CMOS based on switched-capacitor circuit was presented in this paper as the sensor interface circuit.This circuit consists of a balance-bridge module,a charge sensitive amplifier,a correlated-double-sampling module,and a logic timing control module.A special two-path feedback circuit configuration was given to improve the system linearity.The quantitative analysis of error voltage and noise shows that there is tradeoff around circuit's noise,speed and accuracy.A detailed design method was given for this tradeoff.The noise performance optimized circuit has a noise root spectral density of 1.0 μV/Hz,equivalent to rms noise root spectral density of 1.63 μg/Hz.Therefore,the sensor's Brown noise becomes the main noise source in this design.This circuit is designed with 0.5 μm n-well CMOS process.Under a ±5 V supply,the Hspice simulation shows that the system sensitivity achieves 0.616 V/g,the system offset is as low as 1.456 mV,the non-linearity is below 0.03%,and the system linear range achieves ±5 g. 更多还原
出处 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2010年第5期684-689,共6页 哈尔滨工业大学学报(英文版)
基金 Sponsored by the National High Technology Research and Development Program of China(863Program)(Grant No.2008AA042201)
关键词 low noise full differential SWITCHED-CAPACITOR CLOSED-LOOP capacitive micro-accelerometer low noise full differential switched-capacitor closed-loop capacitive micro-accelerometer
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参考文献13

  • 1Yazdi N,Ayazi F,Najafi K.Micromachined inertial sensers.Proceedings of the IEEE,1998,86(8):1640-1659.
  • 2Külah H,Chae J,Yazdi N,et al.Noise analysis and characterization of a sigma-delta capacitive microaccelerometer.IEEE Journal of Solid-State Circuits,2006,41(2):352-361.
  • 3Lemkin M,Boser B E.A three-axis micromachined accelerometer with a CMOS position-sense interface and digital offset-trim electronics.IEEE Journal of Solid-State Circuits,1999,34(4):456-468.
  • 4Amini B V,Ayazi F.A 2.5V 14-bit sigma-delta CMOSSOI capacitive accelerometer.IEEE Journal of Solid State Circuits,2004,39(12):2467-2476.
  • 5Yazdi N,Najafi K.An interface IC for a capacitive μg accelerometer.International Solid-State Circuits Conference.1999.132-133.
  • 6Amini B V,Pourkamali S,Zaman M,et al.A new input switching scheme for a capacitive micro-g accelerometer.Symposium on VLSI Circuits.San Francisco.2004.310-313.
  • 7Sansen W M C.Analog Design Essentials.Netherlands:Springer,2006.144-146.
  • 8Gabrielson T B.Mechanical-thermal noise in micromachined acoustic and vibration sensors.IEEE Transactions on Electron Devices,1993,40(5):903-909.
  • 9Kulah H,Yazdi N,Najafi K.A CMOS switched-capacitor interface circuit for an integrated accelerometer.Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems.Lansing.2000.244-247.
  • 10Baschirotto A,Cola A,Chiesa E,et al.A ± 1 g dual axis linear accelerometer in a standard 0.5 μm CMOS technology for high-sensitivity applications.IEEE Journal of Solid-State Circuits,2003,38(7):1292-1297.

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