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基于IEEE 1500标准的IP核测试壳设计 被引量:13

Design of IP core test wrapper based on IEEE 1500 standard
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摘要 随着集成电路规模的不断扩大,基于IP核复用的SOC设计技术被广泛应用,但是由于IP核的来源不同,设计标准的不兼容等因素,使得SOC的测试变得越来越困难。IEEE1500标准设立的目标是标准化IP核提供商与用户之间的测试接口,简化核测试信息的复用。本文在研究IEEE1500标准的硬件结构基础上,讨论了1500的测试指令集,然后以基准电路集ISCAS89中的s349时序电路为例,对其进行全扫描设计之后,详细说明了基于IEEE1500标准的IP核测试壳各部分的设计过程,最后通过仿真实验,验证了在不同测试指令和故障模式下,测试壳的有效性。 With the continuous improvements on the scale of integrated circuits,the technology of IP core-based SOC design is widely used.Because of the fact that IP cores usually come from different providers and the incompatibility of design standard,it becomes more and more difficult to test SOC.IEEE 1500 standard's goal is standardizing the test interface between IP core providers and core users and aims at improving ease of test reuse and test integration with respect to the core-based SOC.The background of the IEEE 1500 standard,the basic structure and the test instructions set are described in this paper firstly.Then taking s349 sequential circuit for example,we describe the design of test wrapper based on the IEEE 1500 standard for embedded IP core in detail.Finally we verify the test wrapper's efficiency under different test instructions through simulating experiments.
出处 《电子测量技术》 2010年第7期88-91,95,共5页 Electronic Measurement Technology
基金 装备预研重点基金(9140A17040409HT01)资助课题 航天支撑基金(NO.2009-HT-HGD-03)资助课题
关键词 IEEE1500标准 SOC测试 测试壳 IEEE 1500 standard SOC Test test wrapper
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参考文献10

  • 1IEEE 1500 Group.IEEE 1500 Standard for Embedded Core Test (SECT),IEEE,2005; http://grouper/ieee.org/groups/1500/index.html.
  • 2Institute of Electrical and Electronic Engineers:IEEE standard testability method for embedded core-based integrated circuits,IEEE Std.1500-2005,2005:1-127.
  • 3魏岩,固靖,洪开.基于嵌入式芯核测试的IEEE std 1500标准[J].微计算机信息,2009,25(11):138-140. 被引量:4
  • 4杨鹏,邱静,刘冠军.嵌入式芯核测试标准IEEE Std 1500综述[J].测控技术,2006,25(8):40-43. 被引量:14
  • 5刘建强,李智.SOC中嵌入式核测试标准IEEEP1500综述与研究[J].国外电子测量技术,2005,24(5):17-20. 被引量:5
  • 6ISCAS'89 Benchmark.http://www.cbl.ncsu.edu:16080/benchmarks/ISCAS89/.
  • 7GLEZ F B,BRYAN D,KOZMINSKI K.Combinational Profiles of Sequential Benchmark Circuits[J].Proc.International Symposium on Circuits and Systems (ISCAS),Portland,OR,1989:1924-1934.
  • 8KAPUR R,LOUSBERG M,TAYLOR T,et al.The language for describing core-based test[J].Proc.Int.Test Conf.ITC,2001:131-139.
  • 9JAN MARINISSEN E,GOEL S K,LOUSBERG M.Wrapper Design for Embedded Core Test[J].ITC International Test Conference.2000:911-915.
  • 10陆思安,严晓浪,李浩亮,沈海斌,何乐年.面向IP核测试复用的测试环设计[J].浙江大学学报(工学版),2004,38(1):93-97. 被引量:8

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