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基于交错并联Buck变换器新型驱动电路的研究 被引量:11

Research on a New Gate Driver Circuit Based on Two Phase-interleaving Buck Converter
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摘要 传统的电压源驱动MOSFET的方式,开关损耗会随着开关频率的增加而显著增加。交错并联技术能够以较低的开关频率实现高频输出电压波动,具有纹波互消、相间分流等优点。在此将一种新型的电流源驱动电路应用于交错并联技术的Buck主电路,在对电路损耗进行详细分析的基础上,设计了在开关频率1 MHz、输入5 V条件下,实现输出1.3 V/20A的电路拓扑,达到了较小电压纹波输出和较高装置效率的要求。 With traditional voltage source driver,switching losses are greatly increased with the increas-ing of switching fre-quency.The interleaving technique has several advantages such as the high frequen-cy output voltage ripple with lower switching frequency,ripple cancellation,current sharing between the phases.A new circuit of current source driver is ap-plied to a two phase-interleaving Buck converter.A smaller output voltage ripple and high efficiency devices are achieved basing on the analysis of power loss at frequency 1 MHz,5 V input,1.3 V and 25 A output.
机构地区 安徽工业大学
出处 《电力电子技术》 CSCD 北大核心 2010年第4期36-37,84,共3页 Power Electronics
基金 国家自然科学基金(50777001)~~
关键词 变换器 驱动电路 电流源 开关损耗 converter drive current current source switching loss
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参考文献5

  • 1张占松,蔡宜三.开源电源的原理与设计[M] 北京:电子工业出版社,2006.
  • 2Zhihua Yang.A New Dual Channel Resonant Gate Drive Circuit for Synchronous Rectifiers[A].IEEE Annual Power Electronic Conference[C].2005:756-762.
  • 3Wilson Eberle.A Current Source Gate Driver Achieving Switching Loss Saving and Gate Energy Recovery at 1 MHz[J].IEEE Trans.on Power Electronic,2008,23 (2):678-691.
  • 4Zhiliang Zhang.Optimal Design of Current Source Gate Driver for a Buck Voltage Regulator Based on a New Analytical Loss ModeI[A].IEEE Annual Power Electronic Specialists Conference[C].2007:1556-1562.
  • 5Y Ren.Analytical Loss Model of Power MOSFET[J].IEEE Trans.on Power Electronic,2006,21(2):310-319.

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