期刊文献+

基于电热耦合效应的高性能处理器单元降温降耗算法

Algorithm of Lowing Temperature and Power Based on the Electric and Thermal-Coupling Effect for High-Performance Processor Unit
在线阅读 下载PDF
导出
摘要 基于已有的TALK算法,提出了基于电热耦合效应的空闲时间均匀分配(TCED)算法.实验表明:TCED算法十分简便,合理地利用空闲时间来降温,解决了TALK算法在较低负载和极高负载情况下的不足.因此TCED算法适用于高性能处理器单元各种工作负载的降温降耗. Based on the existing TALK algorithm,the paper put forward another more effective algorithm-free time evenly distributed technique based on the electric and thermal coupling effect (TCED),which is more convenient and make more rational use of free time to lower temperature and meet the shortfall of TALK when applying to low load and very high load. In sum,TCED algorithm is more universally applied to decrease the temperature and energy consumption for high-performance processor unit with various sizes of workload.
出处 《微电子学与计算机》 CSCD 北大核心 2010年第5期162-166,共5页 Microelectronics & Computer
基金 国家自然科学基金项目(60876025) 国家"八六三"计划项目(2009AA01Z126)
关键词 高性能处理器 静态功耗 电热耦合效应 功耗优化算法 high-performance processor static power consumption electric and thermal-coupling effect power optimization algorithm
  • 相关文献

参考文献7

  • 1徐懿,李丽,高明伦,黄壮雄,杨盛光.纳米集成电路静态功耗机理及低功耗设计技术[J].微电子学与计算机,2007,24(5):184-188. 被引量:8
  • 2张孝坤,王继安,徐赏林,梁婧,龚敏.一种可用于模块化设计的热关断电路[J].微电子学与计算机,2007,24(6):130-132. 被引量:4
  • 3Berkeley BSIM3 device models. URL[EB/OL]. [2009 - 06 - 10]. http://www- device. EECS. Berkeley. edu/ bsim3/.
  • 4Lin Yuan, Sean Leventhal, Gang Qu. Temperature -aware leakage minimization technique for real- time systems[J ]. Computer - Aided Design, 2006(6) : 761 - 764.
  • 5Skadron K, Abdelzaher T, Stan M R. Control - theoretic techniques and thermal- RC modeling for accurate and localized dynamic thermal management [ J ]. High - Performance Computer Architecture,2002(2) : 17 - 28.
  • 6He L, Liao W, Start M R. System level leakagereduction considering the interdependence of temperatureand leakage [ J ]. Design Automation Conference, 2004 (41 ) : 12 - 17.
  • 7Skadron K. Temperature- aware microarchitecture: modeling and implementation[J]. ACM Trans on Architectureand Code Optimization,2004, 1(1): 94- 125.

二级参考文献10

  • 1戴红卫,郭炜,韩泽耀,王琴.一款低功耗SoC芯片的时钟管理策略[J].微电子学与计算机,2005,22(3):32-35. 被引量:6
  • 2Helms D,Schmidt E,Nebel W.Leakage in CMOS circuits an introduction[A].14th Intel workshop on Power and Timing Modeling Optimization and Simulation[C].Greece,2004:17~35
  • 3Sung-Mo (Steve) Kang.Elements of low power design for integrated systems[A].Proceedings of the 2003 International Symposium on Low Power Electronics and Design[C].Seoul,Korea,2003:205~210
  • 4White Paper of Silicon Design Chain:Silicon Design Chain collaboration extends 90-nanometer low-power design into the mainstream[EB/OL].http://www.silicondesignchain.com
  • 5James Kao,Siva Narendra,Anantha Chandrakasan.Subthreshold leakage modeling and reduction techniques[A].IEEE/ACM international conference on computer-aided design[A].2002,141~148
  • 6Satoshi Shigematsu,Shin'ichiro Mutoh,Yasuyuki Matsuya,et al.A 1-V High-Speed MTCMOS circuit scheme for power-down application circuits[J].IEEE Journal of Solid-State Circuits,1997,32(6):861~869
  • 7Richard Frank,Denis Michel Darmon.Thermal shutdown circuit.United States Patent,2004,81(6):816~851
  • 8Nagel M H,Fonderie M J,Meijer G C M,et al.Integrated 1V thermal shutdown circuit[J].IEEE,electronics Letters,1992,28(10):969~970
  • 9Phillip E Allen,Douglas R Holberg.CMOS analog circuit design[M].Oxford University Press,Inc.,2002:134~143
  • 10张永新,陆生礼,茆邦琴.门控时钟的低功耗设计技术[J].微电子学与计算机,2004,21(1):23-26. 被引量:21

共引文献10

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部