期刊文献+

基于FPGA的容错计算机故障注入研究 被引量:3

Study of Fault-Injection for FPGA Based Fault-Tolerant Computer
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摘要 为了验证以FPGA为主控制器的容错计算机的可靠性,利用构造双NIOSII系统的方法,设计了模拟量、数字量、通讯量以及单粒子效应的故障注入系统。该系统可以通过软件由用户选择故障参数,对容错计算机进行故障输入。它无需改变原容错计算机的硬件设计,对原操作系统也无特殊的要求。 This paper introduces the design of the fault-injection system which is based on the dual NIOS II system method to inject analog fault,digital fault,as well as single event phenomenon fault,into a FPGA based fault-tolerant computer system.This faultinjection system can accept fault parameters through software,which does not need the change of the hardware of the object system.It also has no requirement for the operating system running on the object system.
出处 《微计算机信息》 2010年第14期116-118,共3页 Control & Automation
关键词 FPGA 容错 故障注入 EDAC 单粒子翻转 FPGA Fault-tolerance Fault-injection EDAC Single Event Upset
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参考文献4

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二级参考文献4

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共引文献8

同被引文献28

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