摘要
提出了一种基于抽样的H.264帧内4×4块预测模式选择方法,设计了基于PLB总线的IP核,对预测点进行抽样选择,并对硬件资源的消耗进行了优化。将此方法在JM中与全搜索进行了比较,并将设计的软核在Xilinx Virtex-IIPRO开发板中进行了验证。结果表明,该抽样算法在PSNR和编码比特数方面都能达到与全搜索相近的结果,而且软核在硬件资源的消耗上也有明显的减少,编码效率明显提高,能够适应实时编码。
This paper advanced a method for intra-prediction mode selection for 4×4 blocks in H.246 based on sampling and designed its IP based on PLB bus, which are optimized for the selectiola prediction pixel and hardware resources. This method has been compared with full search in JM, and the IP is verified on a Virtex-Ⅱ PRO FPGA. The results show that it can receive similar result compared with FS in PSNR and bits and consumed very little hardware resource. With high efficiency, this design could fully adapt to real-time coding.
出处
《微型机与应用》
2010年第6期14-16,19,共4页
Microcomputer & Its Applications
