摘要
详述了参数可设置模块库及其函数被应用于信号发生器设计的流程,并根据时序仿真及嵌入式逻辑分析仪得到的结果,验证了设计流程的正确性、优越性和必要性.
Design progress of signal generator with library of parameterized modules was described. And the results from timing simulation and embedded logic analyzer showed the design process was efficient, successful and necessary.
出处
《河南教育学院学报（自然科学版）》
2010年第1期26-28,共3页
Journal of Henan Institute of Education(Natural Science Edition)
基金
河南省教育厅科技攻关计划项目(2009A510003)
郑州市科技攻关项目(0910SGYG21203)
