摘要
本文结合处理器芯片实际项目,重点介绍了功能验证环节的工作。文章基于VMM验证平台,利用System Verilog语言自动生成测试激励,采用断言和功能覆盖率相结合的验证方法,实时监测RTL模型运行时的各种信号,自动进行覆盖率统计,通过增加约束实现覆盖率的快速收敛。文章最终给出了基于VMM验证平台进行功能验证的结果,绘制了功能覆盖率上升曲线。
According to a processor chip project, functional verification to the processor is introduced based on VMM uniform verification platform. Test excitation can be generated automatically with System Verilog language, and various signals can be monitored in real-time by incorporating of assertion and functional coverage verification. Coverage statistic can be obtained automatically, and a good convergence of coverage can be achieved by adding additional constrains. The functional verification results based on the VMM verification platform are provided, and the rising curves of the functional coverage are given.
出处
《火控雷达技术》
2010年第1期45-48,共4页
Fire Control Radar Technology
基金
国家863计划项目(2009AA7010420)
