摘要
为了实现对视频图像的采集和多格式输出,通常使用低速存储器存储所采集的图像信息.笔者介绍了视频解码芯片SAA7113的特点及其应用,研究了基于CPLD对SA7113的硬件电路配置结构的实现,并给出了使用VHDL语言通过I2C总线进行初始化控制的编程方法,从而实现了视频采集和使用8 MHz/s的低速存储器存储所采集的图像信息,并能根据需要由多种格式输出.
In order to achieve the right video image acquisition and multi-format output,images collected by low-speed memory are usually used. This article describes the characteristics and application of SAA7113 video decoder chip. Implementation of the SA7113 hardware circuit configuration structure is researched based on CPLD. Through I^2 C bus, the VHDL language is used to initialize the control of programming. Therefore, video aequistion,image information collection by 8 MHz/s low-speed memory, and multi-format output can be achieved.
出处
《吉首大学学报（自然科学版）》
CAS
2009年第6期66-70,共5页
Journal of Jishou University(Natural Sciences Edition)
