摘要
随着VLSI技术的飞速发展,现在高速DSP芯片的内核的中心频率已经远远快于外部存储器的存取频率,这种片上片外存储器存取速度不匹配的问题被称作MemoryWall,它极大限制了DSP对于需要大量数据交换的复杂算法的处理能力。针对这一问题本文在基于MPEG-4压缩算法的编码结构与Ti高速DSPTMS320DM642的二级Cache的研究基础上提出拆解编码循环与设置片上缓存的方法来解决指令Cache与数据Cache的缺失问题,极大提高了编码效率。
Due to the speed up of the VLSI technology, the high speed of the DSP core is not compatible with much lower speed external memory. The low speed of the off - chip memory, which is mainly responsible for the CPU delays, all that was called memory wall. The memory wall seriously confined the DSP＇ s computation capability for the intense data exchange algorithm. This paper provides two algorithms（ Regulation the L2 cache , adjust the encoding procedure） to speed up the performance of the Cache which based on the study of the architecture of the TMS320DM642 two level cache and the algorithm flow of the MPEG -4 encoder. Meanwhile, with these algorithms the cache miss is reduced and the encoding performance is increased about 2 frame/s（ format D1 ）.
出处
《中国传媒大学学报（自然科学版）》
2009年第3期58-63,共6页
Journal of Communication University of China：Science and Technology
