摘要
本文讨论了集成电路芯片中单一压焊块树形结构电源／地线网络的线宽设计给定电源（地）线的布线拓扑结构，在满足最大可允许电压降、最小工艺线宽和金属电迁移等约束的条件下使整个电源（地）网络所占用的布线面积最小本文采用拉格朗日乘子算法实现了这个目标，不仅取得比较小的电源布线面积。
This paper deals with segment width optimization of single Pad power/ground tree after the tree has been constructed. Given a routing topology of power or ground, our goal is to minimize the routing area of them under the constraints of maximum allowable Voltage drops for maintaining proper lOgic level and switching speed, minimal width imposed by specific technology and metal migration. A procedure which uses Langrangian Multiplier Algorithm is presented to minimize the area taken by power/ ground routing with high running speed.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1998年第8期126-128,共3页
Acta Electronica Sinica
基金
高等学校博士学科点专项科研基金!9600330
