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一种Ling选择进位加法器

Ling Carry-Select Adder
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摘要 设计一种Ling选择进位加法器,组间采用Ling进位代替传统的进位,利用内部连线与节点扇出平衡的并行前缀逻辑产生进位机制,并对通常的进位选择模块进行调整,以使其适合Ling进位。该加法器兼具了Ling加法器的快速性,又避免了逻辑产生的复杂性。实验结果表明,与超前进位加法器相比,该加法器的速度提高12%左右。 A new Ling Carry-Select Adder(CSA) is desighed. Ling carries arc employed as inter-group carries instead of traditional ones. The carry mechanism is generated by using internal connection and parallel prefix logic of node fanout balance. The usual CSA mode is adjusted, which is fit for Ling carry. This adder has the performance of rapidity for Ling adder, and avoids the complexity of logic generation. Experimental results show the speed of this adder is promoted by about 12% compared with Carry-Lookahead Adder(CLA).
出处 《计算机工程》 CAS CSCD 北大核心 2009年第16期245-247,共3页 Computer Engineering
基金 国家自然科学基金资助项目(90407016 60676009)
关键词 Ling进位 并行前缀计算 超前进位加法器 Ling carry parallel prefix computation Carry-Lookahead Adder(CLA)
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参考文献4

  • 1Parhami B. Computer Arithmetic Algorithms and Hardware Designs[M]. [S. l.]: Oxford University Press, 2000.
  • 2Nagendra C. Area Time Power Tradeoffs in Parallel Adders[J]. IEEE Trans. on Circuits and Systems, 1996, 43(10): 689-702.
  • 3Grad J. High-speed Binary Adder[J]. IBM Journal of Research and Development, 1981, 25(3): 156-166.
  • 4Brent R. A Regular Layout for Parallel Adders[J]. IEEE Trans. on Computers, 1982, 31(3): 260-264.

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