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嵌入式处理器中的寄存器堆延迟写回技术 被引量：1

Register File Delay-Writeback in Embedded Microprocessors
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摘要 为了降低嵌入式处理器中寄存器堆的功耗,提出一种基于限制取指的寄存器堆延迟写回技术.对于嵌入式处理器,传统的寄存器堆延迟写回技术带来的效果并不明显,文中根据处理器前端比后端快的特点,采用限制取指技术提高寄存器堆延迟写回的效果,不仅大幅度地消除了对寄存器堆不必要的写操作,同时也降低了处理器前端的功耗.FPGA平台上的实验结果表明:在不影响程序性能的情况下,应用该技术后,EEMBC程序对定点寄存器堆的写操作减少了35%,对ICache的访问减少了15%,且没有额外的开销. Abstract To reduce the power consumption of register file in embedded microprocessors, a register file delay-writeback technique based on fetch-throttling is proposed. Due to the fact that the front-end is faster than the back-end in microprocessors, traditional register file delay-writeback techniques are not effective. Our method improves the efficiency greatly through fetch-throttling. Not only the redundant writes to register file are reduced, but also the power of processor front-end is reduced. The experimental results on FPGA show that the proposed technique reduced 35% writes to register file and 15% accesses to ICache for EEMBC programs with little performance loss and no additional overhead.
作者 凡启飞 张戈 徐翠萍
机构地区 中国科学技术大学计算机科学技术系 中国科学院计算机系统结构重点实验室 中国科学院计算技术研究所
出处 《计算机辅助设计与图形学学报》 EI CSCD 北大核心 2009年第8期1182-1188,共7页 Journal of Computer-Aided Design & Computer Graphics
基金 国家"九七三"重点基础研究发展计划项目(2005CB321603) 国家自然科学基金(60673146 60703017 60736102 60803029) 国家"八六三"高技术研究发展计划(2007AA01Z114 2009AA01Z125)
关键词 嵌入式处理器 寄存器堆 限制取指 延迟写回 embedded processor register file fetch throttling delay-writeback
分类号 TP302 [自动化与计算机技术—计算机系统结构]
  • 相关文献

参考文献11

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共引文献52

同被引文献5

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计算机辅助设计与图形学学报
2009年 第8期

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