摘要
笔者针对"计算机组成原理"课程的实验与理论教学不配套的问题,设计了16位模型机微处理器。本文阐述了模型机的核心——微处理器的设计。该处理器用硬件描述语言设计,优化了算术逻辑运算单元ALU(Arithmetic Logic Unit)的描述方法,使其资源占用较少;采用微程序控制的方法,能够通过实验工具观察分析处理器工作时内部信息流动的过程。该处理器在Xilinx FPGA上实现,并已在"计算机组成原理"课程教学中应用多年。
To solve the problem in the Computer Orgnanization and Architecture course which is the experimental teaching is inconsistent with the theoretical teaching, a simplified but fully functional 16-bit teaching microprocessor is designed. This paper focuses on the core of the model computer and the microprocessor design. The microprocessor is easy to modify as a VHDL and Verilog HDL modular, hierarchical description, gives access to every internal signal, and is open for user modifications. The design of ALU was optimized so that it consumes fewer resources. The microprocessor was implemented on Xilinx FPGA and has been applied in the Computer Organization and Architecture course for several years.
出处
《电气电子教学学报》
2009年第2期81-82,85,共3页
Journal of Electrical and Electronic Education
基金
江苏大学教学改革项目资助(JGY2007012)
关键词
模型机
FPGA
计算机组成原理
model computer
FPGA
computer organization and architecture
