摘要
本文介绍了UART的基本特点,提出了一种简单、实用的UART收发器的实现方法,并且采用VHDL语言设计了一种通用的软核。在FPGA上进行测试,结果表明了该设计电路稳定、可靠,实现了UART功能的正确性和可靠性。
This paper introduces the UART characteristics, and puts forward a simple and practieal realization method of a uart. Furthermore, a versatile soft-core designed with VHDL is presented. It is stable and reliable depend on testing in FPGA devices, and realize the correctness and reliability of the UART.
出处
《中国新通信》
2009年第7期62-65,共4页
China New Telecommunications
