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快速傅立叶变换处理器的现场可编程门阵列设计与实现

Field programmable gate array design and implementation of fast Fourior transform processor
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摘要 为满足现代数字通信和信号处理的运算速度要求,研究了基于现场可编程门阵列的快速傅立叶变换处理器的设计与实现方案.论文采用时域抽取算法,以VirtexⅡ系列XC2V40型号现场可编程门阵列芯片为硬件平台,以Xilinx公司ISE9.1为软件平台,采用VHDL硬件描述语言,进行了复数快速傅立叶变换处理器的设计与实现.仿真综合结果验证了设计的有效性. To meet the high-speed requirements in the field of modern digital communication and signal processing,the design and implementation problems of complex fast Fourier transform processor based on field programmable gate array were studied. The algorithm of decimation-in-time(DIT),the field pro- grammable gate array hardware platform of Virtex U XC2V40, the software platform of Xilinx Inc ISE9.1 and VHSIC hard- ware description language are used to design and implement complex fast Fourier transform processor.Simulation and syn- thesis results show the effectiveness of the design and implemen- tation.
作者 任喆 郑紫微
出处 《大连海事大学学报》 CAS CSCD 北大核心 2007年第S2期135-138,共4页 Journal of Dalian Maritime University
基金 国家自然科学基金(60602021 60772119) 教育部高等学校博士学科点专项科研基金(20060151001) 大连市优秀青年科技人才基金(2006J23JH037).
关键词 快速傅立叶变换 现场可编程门阵列 设计与实现 fast Fourior transform field programmable gate array design and implementation
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参考文献6

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