摘要
提出了电荷自补偿技术,此技术利用P型多米诺电路动态结点的放电对N型多米诺电路的动态结点充电,并在此技术基础上综合应用双阈值技术和多电源电压技术,设计了新型低功耗、高性能Zipper CMOS多米诺全加器.仿真过程中提出了功耗分布法,精确找到了电荷自补偿技术的最优路径.仿真结果表明,在相同的时间延迟下,与标准Zipper CMOS多米诺全加器、双阈值Zipper CMOS多米诺全加器、多电源电压Zipper CMOS多米诺全加器相比,新型Zipper CMOS多米诺全加器动态功耗分别减小了37%、35%和7%,静态功耗分别减小了41%,20%和43%.最后,分析并得到了新型全加器漏电流最低的输入矢量和时钟状态.
A charge self-compensation techniques,based on the dynamic node of the P-type charging dynamic node of N-type,is proposed in this paper.Utilizing this technique,the dual-threshold voltage techniques and the multiple supply voltages techniques a low power and high performance Zipper CMOS domino full-adder is designed.And a novel method of the power distribution is introduced.With this method,the optimal path of the proposed Zipper CMOS full-adder with the charge self-compensation techniques is found accurately to minimize the power.Simulation results prove that active power of proposed Zipper CMOS full-adder can be reduced by up to 37%,5% and 7%,and static power can be reduced by up to 41%,20% and 43% as compared to the standard,the dual threshold voltage,and the multiple supply Zipper CMOS domino full-adder under similar delay time,respectively.At last,the inputs and clock signals combination sleep state dependent on leakage current characteristics is analyzed and the optimal sleep state is obtained.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2009年第2期266-271,共6页
Acta Electronica Sinica
