摘要
以ARM为控制核心,FPGA为协处理器的智能控制装置中,设计了一种基于FPGA与ARM7的双字节异步串行通讯的软硬件接口。在FPGA内部集成专用的UART模块,实现FPGA与ARM之间的通讯。采用有限状态机设计UART波特率发生器、接收器和发送器模块,并集成了奇偶校验功能。给出了FPGA与ARM连接的电路图、UART顶层模块的电路图及其在ModelSim软件上的仿真结果。经过反复试验证明,该电路简单、可靠。
This paper presents a design of interface circuit about double-byte asynchronous serial port communication between FPGA and ARM. The software-hardware interface circuit is based on an intelligent control device constructed by core controller ARM and coprocessor FPGA. A specialization UART is integrated in FPGA technology to implement responsive communication. With the characteristics of FPGA and VHDL; the modular designs of baud generator , sender and receiver are based on finite state machine. The top level module and simulation results of modules are listed. The analyzing results shows that this circuit is validated. It takes full advantage of FPGA to enhance the agility; also, the circuit is simplified and reliable.
出处
《广西工学院学报》
CAS
2008年第4期25-29,共5页
Journal of Guangxi University of Technology
基金
广西工学院科学基金(院科061401)资助
