摘要
精确中断机制是嵌入式微处理器正确运行和状态恢复的保证。由于中断发生在指令边界,等到需要提交的指令成功改变处理器状态后才能执行流水线的冲刷和中断处理程序,不必要的指令预取和译码浪费了时钟周期,降低了中断响应实时性,增加了处理器功耗。文章描述了Longtium C2处理器的结构特点和微操作,提出一种基于指令边界微操作跟踪的精确中断机制IBMT,并对其结构和流程进行了设计和分析。IBMT对指令边界和中断窗口的位置进行实时检测,提前进行流水线冲刷及中断处理程序取指。使每次响应中断时平均节省39.34%的响应时间,提高了中断处理的实时性,避免了不必要的功耗浪费。
Aim. Reviewing some existing literature concerning precise interrupts mechanism such as Refs. 1 through 4, we come to believe that such mechanism can be made more time-saving and to consume less power. In section 1 of the full paper, we describe the architecture of the Longtium C2 microprocessor （in development at NWPU）, which utilized IBMT （Instruction Boundary Micro-operation Tracing） precise interrupts mechanism developed by us to be more time-saving and to consume less power; then we describe the micro-operations of Longtium C2 microprocessor. Section 2 describes the IBMT precise interrupts mechanism; Fig. 2 Shows the schematic of its architecture; Fig. 3 gives the flowchart of its interrupt acknowledgement. We now point out that, in the description of section 2, IBMT precise interrupts mechanism does essentially two things： （1） it inspects instruction boundary and interrupt window every clock cycle, and （2） it then starts up the pipeline flush, pre-fetch, interrupt transfer micro-program and interrupt processing sub-program in advance. Section 3 analyzes the performance of our IBMT precise interrupts mechanism. Subsection 3.2 points out that an average of 39.34% of clock cycles can be saved at every interrupt acknowledgement. Subsection 3.3 points out that unnecessary power consumption can be avoided.
出处
《西北工业大学学报》
EI
CAS
CSCD
北大核心
2008年第5期561-565,共5页
Journal of Northwestern Polytechnical University
基金
国家自然科学基金(60573107)
国家应用材料基金(XA-AM-200509)资助
关键词
微处理器
精确中断
微操作
指令边界微操作跟踪(IBMT)
microprocessor chips, precise interrupt, micro-operation, Instruction Boundary Microoperation Tracing（IBMT）
