摘要
依据VHDL程序设计出针对现场可编程门阵列(FPGA)的脉冲编码调制(PCM)码解调电路。解调数据过程分为位同步、字节同步、帧同步和串并转换,并对相关程序模块进行仿真。通过调试硬件电路,验证了该PCM码解调系统所实现的功能。
The design of the PCM code demodulated circuit based on FPGA with VHDL is given.The demodulation process can be divided into bit synchronization,byte synchronization,frame synchronization,and seriel to parallel conversion.The part of the procedures is simulated.Through circuit debugging,the PCM code demodulation system is certificated.
出处
《国外电子元器件》
2008年第11期3-5,共3页
International Electronic Elements
基金
国家自然科学基金项目(50775209)
