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基于S3C2410的LXI总线C类数据采集仪硬件设计 被引量:1

Hardware design of data acquisition system for LXI bus class C based on S3C2410
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摘要 介绍了一种基于S3C2410的LXI总线C类数据采集仪硬件设计,该设计用AD9224来实现AD转换,用FIFO作为高速缓冲存储区,用CPLD实现控制逻辑,实现了高速数据采集、数据的快速传输和模块灵活控制三者的结合。文章对电路总体设计、电源、信号调理、数据采集、CPU以及网络接口等做了详细介绍,给出了一种LXI总线C类高速数据采集仪硬件的具体实现方式。 In this paper, hardware design of a kind of data acquisition system for LXI bus class C based on S3C2410 is presented. AD9224 is to realize the A/D conversion, FIFO is employed as high speed buffer, and CPLD is to realize the control logic. High speed data ac- quisition, fast data transfer and agile control have been realized with this module. What is more, the design of general circuit, power cir- cuit, signal conditioning, data acquisition,CPU and network interface are introduced. In the end, the hardware of high speed data acquisition for LXI bus class C, which is successfully realized, is given in detail.
作者 黄志文
出处 《仪器仪表用户》 2008年第5期87-89,共3页 Instrumentation
关键词 LXI总线 高速数据采集 硬件设计 LXI bus high speed data acquisition hardware design
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参考文献5

  • 1LXI Consortium, LXI Standard v1, 1 [ EB/ OL ] , www. lxistandard. org, August 2006
  • 2Analog Device Inc, AD8066:High Performance, 145 MHz Fast- FET? Op Amps [ EB/ OL ] . http://www.analog.com/Up-loadedFiles/Data_Sheets/ADS055 _8066. pdf
  • 3Analog Device Inc, AD8056 : Low Cost, 300 MHz Voltage Feed- back Amplifiers [ EB/ OL ] , http://www.analog.com/UploadedFiles/Data_Sheets/AD8055 _8056.pdf
  • 4Analog Device Inc. AD9224:12 - bit 40 MSPS Monolithic A/D Converter [ EB/ OL ] . http://www.analog. com/Uploaded- Files/Data_Sheets/AD9224. pdf
  • 5赵曙光,郭万有,杨颂华.可编程逻辑器件原理、开发与应用[M].西安:西安电子科技大学出版社,2005:31-40.

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