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低相位噪声、宽调谐范围LC压控振荡器设计 被引量：3

Design of low phase-noise, wide band LC VCO
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摘要 基于开关电容和MOS可变电容相结合的电路结构，设计了一种分段线性压控振荡器，很好地解决了相位噪声与调谐范围之间的矛盾。另外，在尾电流源处加入电感电容滤波，进一步降低相位噪声。采用TSMC0．18μmCMOS工艺，利用Cadence中的SpectreRF对电路进行仿真，当电源电压VDD=1．8V时，其中心频率为1．8GHz，可调频率为1．430-2．134GHz，调谐范围达到37％，在偏离中心频率1MHz处，相位噪声为-131dBc／Hz，静态工作电流为5．2mA。 In order to solve the problem between phase noise and tuning range, a piecewise linear VCO is designed based on the structure of combination of switching-capacitance and MOS varactor. In addition, LC noise filter is added in the tail current source to lower phase noise further more. The circuit is designed in TSMC 0.18μm CMOS process, and simulated by the SpectreRF in Cadence under supply voltage of 1.8V. The central frequency of the VCO is 1.8G.Hz The output frequency ranges from 1.430GHz to 2.134GHz, and tuning range is up to 37%. Phase noise is -131 dBc/Hz at an offset of 1MHz. The static current of the circuit is 5.2mA.
作者 曾健平 谢海情 晏敏 曾云 彭伟
机构地区 湖南大学物理与微电子科学学院
出处 《电路与系统学报》 CSCD 北大核心 2008年第4期135-138,共4页 Journal of Circuits and Systems
基金 湖南省自然科学基金资助项目(05JJ30115)
关键词 压控振荡器 相位噪声 开关电容阵列 电感电容滤波 VCO phase noise switching-capacitance array LC noise filter
分类号 TN402 [电子电信—微电子学与固体电子学]
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参考文献9

  • 1潘莎,赵辉,任俊彦.1.8GHz相位噪声优化的差分压控振荡器[J].微电子学,2003,33(5):390-394. 被引量：11
  • 2邬蓉,衣晓峰,唐长文,苏彦锋,洪志良.一个1.5V低相位噪声的高频率LC压控振荡器的设计[J].复旦学报（自然科学版）,2005,44(1):166-172. 被引量：9
  • 3Donhee Ham, All Hajimiri. Concepts and Methods in Optimization of Integrated LC VCOs [J]. IEEE Journal Of Solid-State Circuits, 2001, 36(6): 896-909.
  • 4Tiebout M. Low-power low-phase-noise differentially tuned quadrate VCO design in a standard CMOS [J]. IEEE Solid-State Circuits, 2001, 36(7): 1018.
  • 5Pietro Andreani, Henrik Sj'oland. A 1.8GHz CMOS VCO with Reduced Phase Noise [J]. IEEE Solid-State Circuits, 2001, 36(4): 245-247.
  • 6AIi Hajimiri, Thomas H Lee. Design Issues in CMOS Differential LC Oscillators [J]. IEEE Solid-State Circuits, 1999, 34(5): 717-724.
  • 7Axel D Berry, Ali M Niknejiad, Robert G Meyer. A Wideband Low-Phase-Noise CMOS VCO [A]. IEEE 2003 Custom Intergrated Circuits Conference [C]. 2003. 555-558.
  • 8Hegazi E, Sjoland H, Abidi A. A filtering technique to lower oscillator phase noise [J]. IEEE Journal of Solid-State Circuits, 2001, 36(12): 1921-1929.
  • 9Francesco Svelto, Member, IEEE, Stefano Deantoni, and Rinaldo Castello, Fellow, IEEE. A 1.3 GHz Low-Phase Noise Fully Tunable CMOS LC VCO [J]. IEEE Journal of Solid-State Circuits, 2000, 35(3): 356-361.

二级参考文献14

  • 1Craninckx J, Steyiaert M S J. A I. 8-GHz low-phasenoise CMOS VCO using optimized hollow spiral inductors [J]. IEEE J Sol Sta Circ, 1997; 32 (5):736-744.
  • 2John R L, Miles A C. The modeling, characterization and design of monolithic inductors for silicon RF IC's [J]. IEEE J Sol Sta Circ, 1997, 32(3): 357-369.
  • 3Ali M N, Robert G M. Analysis, design and optimization of spiral inductors and transformers for Si RF IC's [J]. IEEE J Sol Sis Circ, 1998, 33(10) :1470-1481.
  • 4Donhee H, All H. Concepts and methods in optimization of integrated LC VCO's [J]. IEEE J Sol Sta Circ, 2001, 36 (6), 896-909.
  • 5Fong N, Plouchart J. Design of wide-band CMOS VCO for multiband wireless LAN applications [J]. IEEE Journal of Solid-State Circuit, 2003, 38(8):1333-1342.
  • 6Hegazi E, Sjoland H, Abidi A. A filtering technique to lower oscillator phase noise [J]. IEEE Journal of Solid-State Circuit, 2001, 36(12):1921-1929.
  • 7Andreani P. Tail current noise suppression in RF CMOS VCO [J]. IEEE Journal of Solid-State Circuit, 2002, 37(3): 342-348.
  • 8Bram D M. CMOS fractional-N synthesizers design for high spectral purity and monolithic integration [M]. The Netherlands: Kluwer Academic Publishers, 2003.
  • 9Pietro Andreani. A 1.8 GHz CMOS VCO with reduced phase noise [EB/OL]. http:∥www.oersted.dtu.dk/personal/pa/pdfArt/vcoL2.pdf, 2001-07-01/2004-04-20.
  • 10Hajimiri A, Lee T H. Design issues in CMOS differential LC oscillators [J]. IEEE Journal of Solid-State Cir-cuits, 1999, 34(5): 717-724.

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电路与系统学报
2008年 第4期

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