摘要
分析C8051F120的扩展存储器原理和FM1808的存储特性,在实验中使用的FM1808存储器在时序上须要求1个CE的下降沿,利用/WR和/RD信号合成FRAM所需的CE下降沿。重点研究两者操作时序耦合的问题,可以通过添加1个逻辑门电路实现耦合。
Analyze principles of extended data storage for C8051F120 and FM1808 storage characteristics. The FM1808 storage utilized in experiment needs a trailing edge on CE pin in time sequence. Composite it with/WR and/RD signal. Focus on the coupling relationship of the time sequence of C8051F120 and FM1808. The coupling could be realized by adding a logic gate.
出处
《兵工自动化》
2008年第8期59-61,共3页
Ordnance Industry Automation
