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超高速高精度并行ADC系统设计与实现 被引量:9

Design and realization of the parallel ADC system for ultra-high speed precision
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摘要 介绍了一种超高速高精度并行ADC系统,给出了方案构成的硬件系统设计,并详细阐述了各硬件系统平台的具体构成。对软件功能模块及信号处理算法做了简要介绍,利用嵌入式逻辑分析仪对4路信号采集的数据进行了测试,并对测试误差做了分析。该超高速高精度并行采样系统可实现1GHz的采样速率,12bit的分辨率,且后续信号处理平台具有一定的通用性和工程应用价值。 A scheme of the parallel ADC system for ultra-high speed precision is introduced in the paper. The design of hardware system is proposed and the composition is described in detail software function modules and Algorithms for Signal Processing is briefly introduced and The sampling datas for four signal are tested though embedded logic analyzer and testing errors are analyzed. The sampling rate for 1GHz and 12bit resolution can be realized in the parallel ADC system for ultra-high speed precision. The follow signal processing platform has some universality and application value in project.
作者 李云
出处 《微计算机信息》 北大核心 2008年第20期307-309,共3页 Control & Automation
关键词 超高速 时间交叉采样 高精度 嵌入式逻辑分析仪 ultra-high speed time-interleaved sampling high precision embedded logic analyzer
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